Innovations in the Memory System

Balasubramonian, Rajeev, Enright Jerger, Natalie, Martonosi, Margaret

  • 出版商: Morgan & Claypool
  • 出版日期: 2019-09-10
  • 售價: $3,150
  • 貴賓價: 9.5$2,993
  • 語言: 英文
  • 頁數: 151
  • 裝訂: Hardcover - also called cloth, retail trade, or trade
  • ISBN: 1681736179
  • ISBN-13: 9781681736174
  • 海外代購書籍(需單獨結帳)

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This is a tour through recent and prominent works regarding new DRAM chip designs and technologies, near data processing approaches, new memory channel architectures, techniques to tolerate the overheads of refresh and fault tolerance, security attacks and mitigations, and memory scheduling.

The memory system will soon be a hub for future innovation. While conventional memory systems focused primarily on high density, other memory system metrics like energy, security, and reliability are grabbing modern research headlines. With processor performance stagnating, it is also time to consider new programming models that move some application computations into the memory system. This, in turn, will lead to feature-rich memory systems with new interfaces. The past decade has seen a number of memory system innovations that point to this future where the memory system will be much more than dense rows of unintelligent bits.