Verilog Designer's Library (IE-Paperback)

Bob Zeidman, Robert M. Zeidman

  • 出版商: Prentice Hall
  • 出版日期: 1999-06-14
  • 售價: $1,007
  • 語言: 英文
  • 頁數: 432
  • ISBN: 9867594290
  • ISBN-13: 9789867594297
  • 相關分類: Verilog
  • 已絕版

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商品描述

Verilog Developer's Librarybrings together an extensive library of Verilog routines, each designed to simplify and streamline a key task in integrated circuit design. Fully documented, well organized, and provided royalty-free on CD-ROM for your personal use, these routines offer the potential to dramatically reduce your development time -- and your time to market. And if you're relatively new to Verilog, these routines also make an outstanding tutorial.KEY TOPICS:The routines are organized according to functionality, with each chapter addressing a widely-used function, including state machines, memories, memory controllers, data flow, error detection and correction, and many more. Both behavioral and RTL models are provided. From linear feedback shift registers to encrypter/decrypters, checksum and CRC code to SRAM controller code, this book offers sophisticated solutions to problems you would otherwise have to write new code to solve. Each routine is thoroughly, clearly explained -- so you'll find it exceptionally easy and convenient to adapt them as needed. The accompanying CD-ROM contains all the book's source code. MARKET:For Verilog users familiar with the basic structure of the language and want to develop real applications. Titles include: design specialists, analysts, trainers, consultants, developers, and system integrators.

Table of Contents

I. CODING TECHNIQUES.

1. General Coding Techniques.
Code Structure. Comments. Do Not Use Disable Instructions.

2. Behavioral Coding Techniques.
Eliminate Periodic Instructions. Eliminate Event Order Dependencies.

3. RTL Coding Techniques.
Synchronous Design. Allowable Uses of Asynchronous Logic.

4. Synthesis Issues.
Correlated Unknown Signals. State Machines. Optimizing Out Terms. Always Blocks.

5. Simulation Issues.
Simulate The Corner Cases. Use Code Coverage Tools. Use The Triple Equals. Use The $display And $stop Statements.

II. BASIC BUILDING BLOCKS.

6. The J-K Flip Flop.
Behavioral Code. RTL Code. Simulation Code.

7. The Shift Register.
Behavioral Code. RTL Code. Simulation Code.

8. The Counter.
Behavioral Code. RTL Code. Simulation Code.

9. The Adder.
Behavioral Code. RTL Code. Simulation Code.

III. STATE MACHINES.

10. The Moore State Machine.
Behavioral Code. RTL Code. Simulation Code.

11. The Mealy State Machine.
Behavioral Code. RTL Code. Simulation Code.

12. The One-Hot State Machine for FPGAs.
RTL Code. Simulation Code.

IV. MISCELLANEOUS COMPLEX FUNCTIONS.

13. The Linear Feedback Shift Register (LFSR).
Behavioral Code. RTL Code. Simulation Code.

14. The Encrypter/Decrypter.
Behavioral Code. RTL Code. Simulation Code.

15. The Phase Locked Loop (PLL).
Behavioral Code. RTL Code. Simulation Code.

16. The Unsigned Integer Multiplier.
Behavioral Code. RTL Code. Simulation Code.

17. The Signed Integer Multiplier.
Behavioral Code. RTL Code. Simulation Code.

V. ERROR DETECTION AND CORRECTION.

18. The Parity Generator and Checker.
Implementation Code. Simulation Code.

19. Hamming Code Logic.
Implementation Code. Simulation Code.

20. The Checksum.
Implementation Code. Simulation Code.

21. The Cyclic Redundancy Check (CRC).
Behavioral Code. RTL Code. Simulation Code.

VI. MEMORIES.

22. The Random Access Memory (RAM).
Implementation Code. Simulation Code.

23. The Dual Port RAM.
Implementation Code. Simulation Code.

24. The Synchronous FIFO.
Behavioral Code. RTL Code. Simulation Code.

25. The Synchronizing FIFO.
Behavioral Code. RTL Code. Simulation Code.

VII. MEMORY CONTROLLERS.

26. The SRAM/ROM Controller.
Behavioral Code. RTL Code. Simulation Code.

27. The Synchronous SRAM Controller.
Behavioral Code. RTL Code. Simulation Code.

28. The DRAM Controller.
Behavioral Code. RTL Code. Simulation Code.

29. The Fast Page Mode DRAM Controller.
Behavioral Code. RTL Code. Simulation Code.

Appendix A: Resources.
Glossary.

Index.