3D Integration for VLSI Systems (Hardcover)

Chuan Seng Tan , Kuan-Neng Chen , Steven J. Koester

3D Integration for VLSI Systems (Hardcover)
  • 出版商: Pan Stanford Publish
  • 出版日期: 2011-09-26
  • 售價: $1,500
  • 貴賓價: 9.8 折 $1,470
  • 語言: 英文
  • 頁數: 350
  • 裝訂: Hardcover
  • ISBN: 981430381X
  • ISBN-13: 9789814303811
  • 相關分類: VLSI

    • 下單後立即進貨 (約5~7天)

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商品描述

<內容簡介>

Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV.

There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.

 

商品描述(中文翻譯)

三維整合（3D integration）被認為是集成電路（IC）持續性能增長的可能途徑，因為傳統的縮小方法面臨著前所未有的基本和經濟限制。晶圓級三維IC可以採用多種形式，通常包括幾個薄化的IC層的堆疊，這些層通過矽通孔（TSV）垂直鍵合和互連。

從三維IC實施中可以獲得一系列的好處，例如形狀因子、密度倍增、改善的延遲和功耗、增強的帶寬和異質集成。本書介紹了該領域的關鍵研究人員的貢獻，包括動機、技術平台、應用和其他設計問題。

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