Guessing Random Additive Noise Decoding: A Hardware Perspective
Abbas, Syed Mohsin, Jalaleddine, Marwan, Gross, Warren J.
- 出版商: Springer
- 出版日期: 2024-08-19
- 售價: $6,040
- 貴賓價: 9.5 折 $5,738
- 語言: 英文
- 頁數: 151
- 裝訂: Quality Paper - also called trade paper
- ISBN: 3031316657
- ISBN-13: 9783031316654
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相關主題
商品描述
GRAND features both soft-input and hard-input variants. Moreover, there are traditional GRAND variants that can be used with any communication channel, and specialized GRAND variants that are developed for a specific communication channel. This book presents a detailed overview of these GRAND variants and their hardware architectures.
The book is structured into four parts. Part 1 introduces linear block codes and the GRAND algorithm. Part 2 discusses the hardware architecture for traditional GRAND variants that can be applied to any underlying communication channel. Part 3 describes the hardware architectures for specialized GRAND variants developed for specific communication channels. Lastly, Part 4 provides an overview of recently proposed GRAND variants and their unique applications.
This book is ideal for researchers or engineers looking to implement high-throughput and energy-efficient hardware for GRAND, as well as seasoned academics and graduate students interested in the topic of VLSI hardware architectures. Additionally, it can serve as reading material in graduate courses covering modern error correcting codes and Maximum Likelihood decoding for short codes.商品描述(中文翻譯)
本書詳細介紹了一種通用的最大似然（Maximum Likelihood, ML）解碼技術，稱為隨機加性噪聲解碼（Guessing Random Additive Noise Decoding, GRAND），該技術適用於短碼長和高速率的線性區塊碼。由於出現了對可靠性和超低延遲要求嚴格的應用，近期業界和學術界對短通道碼及其相應的最大似然解碼算法的興趣重新燃起。這些應用包括機器對機器（Machine-to-Machine, M2M）通信、增強現實和虛擬現實、智慧交通系統（Intelligent Transportation Systems, ITS）、物聯網（Internet of Things, IoTs）以及超可靠低延遲通信（Ultra-Reliable and Low Latency Communications, URLLC），這是5G-NR標準的一個重要應用案例。
GRAND具有軟輸入和硬輸入兩種變體。此外，還有可以與任何通信通道配合使用的傳統GRAND變體，以及為特定通信通道開發的專用GRAND變體。本書對這些GRAND變體及其硬體架構進行了詳細的概述。
本書分為四個部分。第一部分介紹線性區塊碼和GRAND算法。第二部分討論可以應用於任何基礎通信通道的傳統GRAND變體的硬體架構。第三部分描述為特定通信通道開發的專用GRAND變體的硬體架構。最後，第四部分提供了最近提出的GRAND變體及其獨特應用的概述。
本書非常適合希望為GRAND實現高通量和高能效硬體的研究人員或工程師，以及對VLSI硬體架構主題感興趣的資深學者和研究生。此外，它也可以作為涵蓋現代錯誤更正碼和短碼最大似然解碼的研究生課程的閱讀材料。
作者簡介
Syed Mohsin Abbas is a postdoctoral researcher at Integrated Systems for Information Processing (ISIP) Lab at McGill University, Canada. He received his PhD. from the Department of Electronics and Computer Engineering (ECE) at the Hong Kong University of Science and Technology (HKUST). Dr. Abbas's research interests include the development of high-throughput and energy-efficient VLSI architectures for modern channel code decoders. In addition, his curiosity is fueled by topics such as information theory, VLSI Design, Computer Architecture, Embedded Systems, Massive MIMO, and 5G/6G communication.
Marwan Jalaleddine is a PhD. candidate and teaching assistant at McGill University. His research interests lie in modern Error Correcting Codes (ECCs) and their application in wireless communication technology.
Warren J. Gross is a James McGill Professor and the Chair of the Department of Electrical and Computer Engineering at McGill University, Montreal, QC, Canada. He received the PhD degree from the University of Toronto. His research interests are in the design and implementation of signal processing systems and custom computer architectures. He served as the Chair of the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems. He has served as a General Chair and Technical Program Chair of several conferences and workshops. He served as an Associate Editor for the IEEE Transactions on Signal Processing and as a Senior Area Editor.
作者簡介(中文翻譯)
Syed Mohsin Abbas 是加拿大麥吉爾大學整合資訊處理系統（ISIP）實驗室的博士後研究員。他在香港科技大學電子與計算機工程系獲得博士學位。Abbas 博士的研究興趣包括為現代通道碼解碼器開發高通量和節能的 VLSI 架構。此外，他對資訊理論、VLSI 設計、計算機架構、嵌入式系統、大規模 MIMO 以及 5G/6G 通信等主題充滿好奇。
Marwan Jalaleddine 是麥吉爾大學的博士候選人及教學助理。他的研究興趣集中在現代錯誤更正碼（ECC）及其在無線通信技術中的應用。
Warren J. Gross 是麥吉爾大學電機與計算機工程系的詹姆斯·麥吉爾教授及系主任。他在多倫多大學獲得博士學位。他的研究興趣在於信號處理系統和定制計算機架構的設計與實現。他曾擔任 IEEE 信號處理學會信號處理系統設計與實現技術委員會的主席，並擔任多個會議和研討會的總主席及技術程序主席。他曾擔任 IEEE 信號處理期刊的副編輯及高級區域編輯。
