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Description
CMOS PLLs and VCOs for 4G Wireless is the first book devoted to the subject of CMOS PLL and VCO design for future broadband 4th generation wireless devices. These devices will be handheld-centric, requiring very low power consumption and small footprint. They will be able to work across multiple bands and multiple standards covering WWAN (GSM,WCDMA) ,WLAN(802.11 a/b/g) and WPAN(Bluetooth) with different modulations, channel bandwidths , phase noise requirements ,etc. As such, this book discusses design, modeling and optimization techniques for low power fully integrated broadband PLLs and VCOs in deep submicron CMOS.
First, the PLL and VCO performances are studied in the context of the chosen multi-band multi-standard, radio architecture and the adopted frequency plan. Next a thorough study of the design requirements for broadband PLL/VCO design is conducted together with modeling techniques for noise sources in a PLL and VCO focusing on optimization of integrated phase noise for multi-carrier OFDM 64-QAM type applications. Design examples for multi-standard 802.111a/b/g as well as for GSM/WCDMA are fully described and experimental results from 0.18 micron CMOS test chips have demonstrated the validity of the proposed design and optimization techniques. Equally important the work describes techniques for robust high volume production of RF radios in general and for integrated PLL/VCO design in particular including issues such as supply sensitivity, ground bounce and calibration mechanisms.
CMOS PLLS and VCOs for 4G Wireless will be of interest to graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies.
Written for:
Graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies
商品描述(中文翻譯)
《CMOS PLLs and VCOs for 4G Wireless》是第一本專注於未來寬頻第四代無線裝置的CMOS PLL和VCO設計的書籍。這些裝置將以手持為中心,需要非常低的功耗和小的佔地面積。它們將能夠在多個頻段和多個標準上工作,包括WWAN(GSM,WCDMA),WLAN(802.11 a/b/g)和WPAN(藍牙),並具有不同的調變方式、通道帶寬和相位噪聲要求等。因此,本書討論了在深亚微米CMOS中低功耗全集成寬頻PLL和VCO的設計、建模和優化技術。首先,在所選的多頻多標準無線電架構和採用的頻率計劃的背景下研究了PLL和VCO的性能。接下來,對寬頻PLL/VCO設計的設計要求進行了深入研究,並重點介紹了PLL和VCO中噪聲源的建模技術,以優化多載波OFDM 64-QAM類型應用的集成相位噪聲。全面描述了多標準802.111a/b/g和GSM/WCDMA的設計示例,並且來自0.18微米CMOS測試芯片的實驗結果證明了所提出的設計和優化技術的有效性。同樣重要的是,本書還描述了RF無線電的大規模生產技術,特別是集成PLL/VCO設計,包括供應敏感性、地面彈跳和校準機制等問題。《CMOS PLLs and VCOs for 4G Wireless》將對電氣和計算機工程研究生、無線半導體公司的設計經理和RFIC設計師感興趣。