The Verilog Hardware Description Language, 5/e (Hardcover)
暫譯: Verilog 硬體描述語言，第 5 版 (精裝本)

Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog. This edition presents the new IEEE 1364-2001 standard of the language. The examples have all been updated to illustrate the new features of the language. A cross referenced guide to the new and old features is provided. Thus, designers already familiar with Verilog can quickly learn the new features. Newcomers to the language can use it as a guide for reading "old" specifications.

The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered insure its quick use in design.

The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.

Preface.

From the Old to the New. Acknowledgments.

1. Verilog – A Tutorial Introduction.

2. Logic Synthesis.

3. Behavioral Modeling.

4. Concurrent Processes.

5. Module Hierarchy. 

6. Logic Level Modeling.

7. Cycle-Accurate Specification.

8. Advanced Timing.

9. User-Defined Primitives.

10. Switch Level Modeling.

11. Projects. Appendix A: Tutorial Questions and Discussion. Appendix B: Lexical Conventions. Appendix C: Verilog Operators. Appendix D: Verilog Gate Types. Appendix E: Registers, Memories, Integers, and Time 328. Appendix F: System Tasks and Functions. Appendix G: Formal Syntax Definition. Index.