SiP System-in-Package Design and Simulation: Mentor EE Flow Advanced Design Guide (Hardcover)

Suny Li (Li Yang)

SiP System-in-Package Design and Simulation: Mentor EE Flow Advanced Design Guide (Hardcover)

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商品描述

An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow

Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture. 

Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including:  

  • Cavity and sacked dies design
  • FlipChip and RDL design
  • Routing and coppering
  • 3D Real-Time DRC check
  • SiP simulation technology
  • Mentor SiP Design and Simulation Platform

Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools. 

商品描述(中文翻譯)

一本詳細記錄實際系統封裝（SiP）設計流程的高級參考資料。

本書由一位在SiP設計和實施領域處於領先地位的工程師撰寫，展示了如何使用Mentor EE Flow設計SiP。主要涵蓋的關鍵主題包括線鍵合、晶片堆疊、腔體、翻轉芯片和RDL（重分佈層）、嵌入式被動元件、射頻設計、同步設計、極限設計、3D實時DRC（設計規則檢查）和SiP製造。

《System in Package Design and Simulation》全書內容豐富，並以大量插圖進行說明，涵蓋了對SiP設計和製造電子工程師以及SiP使用者至關重要的一系列問題，包括：

- 腔體和堆疊晶片設計
- 翻轉芯片和RDL設計
- 路由和銅覆蓋
- 3D實時DRC檢查
- SiP模擬技術
- Mentor SiP設計和模擬平台

《System in Package Design and Simulation》旨在作為參考資料、教程和自學材料，對於每位SiP設計師都是一個不可或缺的工作資源，尤其是那些使用Mentor設計工具的設計師。

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